shithub: 9ferno

ref: 6966e8d72ae8fb72ebf98909acbd464aff84a3cc

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pbus \- USR/3Com Edgeserver packet bus
.B bind -a '#Y' /dev
.B /dev/pbus
.B /dev/pbusctl
The packet bus driver serves a directory containing two files,
giving MAC-level access to the EPB version of the packet bus
of the US Robotics (3Com) Edgeserver chassis.
The read-only file
.B pbusctl
contains a single integer that gives the chassis slot occupied by the Edge server
(its address on the packet bus).
The file
.B pbus
is read and written to communicate on the bus.
Each write
transmits a single packet on the bus.
The driver expects a four byte header in each write:
.IB "slot chan" " 0 0"
.I slot
is the destination chassis slot number and
.I chan
identifies a logical receiver in that slot.
Including the header, the largest write accepted is 128 bytes.
The driver completes the header as the bus firmware requires;
it also pads each packet with zero bytes to a hardware packet boundary
as it puts it on the bus.
It flashes green in the `Wan TX' LED as packets are transmitted.
Each read of the
.B pbus
file returns the contents of a single packet received from the bus.
The read will block if necessary until a packet arrives.
The data includes a four byte header
as above, and padding to a hardware packet boundary.
Normally a higher-level protocol will provide its own headers including
an actual length.
At reset, the driver downloads firmware to the controller if required.
All invalid packets received are quietly discarded.
Packets are also dropped whenever an internal input queue overflows
because the reader has not kept up with arriving traffic.
.B /os/pc/devpbus.c
.IR plap (3)
The driver detects but does not recover from bus clock loss
The driver cannot be included in the public distribution.