ref: 01a3564915372e4c5a57429fb56fd5dfbbf88ec3
parent: ab1ddf8355ada3ffcf00e34760eafb6bc99d9539
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Sat Dec 17 14:47:35 EST 2016
pc: modify cpu0 page tables in patwc() instead of current cpu ones on 386 kernel, each processor has its own pdb where the primary pdb for kernel mappings is on cpu0 and other cpu's lazily pull pdb entries from cpu0 when they fault in vmapsync(). so we have to edit the table tables in the pdb of cpu0 and not the current processor.
--- a/sys/src/9/pc/mmu.c
+++ b/sys/src/9/pc/mmu.c
@@ -1097,12 +1097,12 @@
/* set the bits for all pages in range */
for(va = (ulong)a; n > 0; n -= z, va += z){- pte = mmuwalk(m->pdb, va, 1, 0);
+ pte = mmuwalk(MACHP(0)->pdb, va, 1, 0);
if(pte && (*pte & (PTEVALID|PTESIZE)) == (PTEVALID|PTESIZE)){z = 4*MB - (va & (4*MB-1));
mask = 3<<3 | 1<<12;
} else {- pte = mmuwalk(m->pdb, va, 2, 0);
+ pte = mmuwalk(MACHP(0)->pdb, va, 2, 0);
if(pte == 0 || (*pte & PTEVALID) == 0)
panic("patwc: va=%#p", va);z = BY2PG - (va & (BY2PG-1));
--
⑨