ref: 3bb4587ddf55108c3a42a1992c28daa7fcb8599f
parent: 1113d194d2e6badaad6c0a9ce091a3b0878afc5b
author: Michael Forney <mforney@mforney.org>
date: Fri Nov 11 20:11:09 EST 2022
usbxhci: wait for reset to complete before continuing initialization The xhci spec says that the HCRST bit is cleared once the reset is complete, and that no operational or runtime registers shall be written while the bit is set. Waiting for the reset to complete fixes initialization of some host controllers, such as the ASMedia ASM1142, which otherwise enter an endless init-recover loop. Also, add a comment about the reason for the 1ms delay. This appears to work around a system hang bug in intel chipsets through the 400 series (see errata 15 in [0]). [0] https://cdrdv2-public.intel.com/620856/620856-009.pdf
--- a/sys/src/9/port/usbxhci.c
+++ b/sys/src/9/port/usbxhci.c
@@ -481,7 +481,10 @@
tsleep(&up->sleep, return0, nil, 10);
ctlr->opr[USBCMD] = HCRST;
+ /* some intel controllers require 1ms delay after reset */
delay(1);
+ for(i=0; (ctlr->opr[USBCMD] & HCRST) != 0 && i<100; i++)
+ tsleep(&up->sleep, return0, nil, 10);
for(i=0; (ctlr->opr[USBSTS] & (CNR|HCH)) != HCH && i<100; i++)
tsleep(&up->sleep, return0, nil, 10);
--
⑨