ref: 8352e264aabdde6e960e934ae62e634a8e55a79c
parent: 89f36352511787f8cc7e090764b82e563979c10f
author: google <google@daverabbitz.ath.cx>
date: Wed Sep 19 17:07:44 EDT 2012
Enable busmastering for SCH (Poulsbo) PATA controller.
--- a/sys/src/9/pc/sdide.c
+++ b/sys/src/9/pc/sdide.c
@@ -2129,6 +2129,10 @@
map |= 2;
irqack = ichirqack;
break;
+ case (0x811a<<16)|0x8086: /* Intel SCH (Poulsbo) */
+ map = 1;
+ irqack = ichirqack;
+ break;
}
for(channel = 0; channel < 2; channel++){if((map & 1<<channel) == 0)
@@ -2255,7 +2259,8 @@
atadmaclr(ctlr);
if(ctlr->pcidev != nil)
pcisetbme(ctlr->pcidev);
- ctlr->prdt = mallocalign(Nprd*sizeof(Prd), 4, 0, 64*1024);
+ /* Intel SCH requires 8 byte alignment, though datasheet says 4 m( */
+ ctlr->prdt = mallocalign(Nprd*sizeof(Prd), 8, 0, 64*1024);
}
snprint(name, sizeof(name), "%s (%s)", sdev->name, sdev->ifc->name);
intrenable(ctlr->irq, atainterrupt, ctlr, ctlr->tbdf, name);
--
⑨