ref: 8d9bbfdef2e2aa703ee9194ab96461649093c84c
parent: dcb6f37f040a3b54efe590d49ea44303600d0670
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Fri May 17 14:56:34 EDT 2019
bcm64: no need to flush instruction cache when switching TTBR0
--- a/sys/src/9/bcm64/l.s
+++ b/sys/src/9/bcm64/l.s
@@ -331,8 +331,7 @@
MSR R0, TTBR0_EL1
DSB $ISH
ISB $SY
-
- B cacheiinv(SB)
+ RETURN
/*
* TLB maintenance operations.
--
⑨