ref: 96a8ee0c4357b2a4af9c08f74680f71c9f4857b6
parent: d9729b6d4fdac598575a0d08fe5bbd37a1b5fdda
parent: 20e1f32aed3b35c3289b35f643eee009d14dca74
author: cinap_lenrek <cinap_lenrek@gmx.de>
date: Thu Oct 3 22:27:53 EDT 2013
merge
--- a/sys/src/9/pc/ether83815.c
+++ b/sys/src/9/pc/ether83815.c
@@ -92,6 +92,7 @@
SiSrev630s = 0x81,
SiSrev630e = 0x82,
SiSrev630ea1 = 0x83,
+ SiSrev635 = 0x90,
SiSeenodeaddr = 8, /* short addr of SiS eeprom mac addr */
SiS630eenodeaddr = 9, /* likewise for the 630 */
@@ -166,6 +167,7 @@
enum {/* registers (could memory map) */
Rcr= 0x00, /* command register */
+ Rld= 1<<10, /* reload */
Rst= 1<<8,
Rxr= 1<<5, /* receiver reset */
Txr= 1<<4, /* transmitter reset */
@@ -772,6 +774,8 @@
* Soft-reset the controller
*/
resetctlr(ctlr);
+ if(ctlr->id != Nat83815)
+ return 0;
csr32w(ctlr, Rccsr, Pmests);
csr32w(ctlr, Rccsr, 0);
csr32w(ctlr, Rcfg, csr32r(ctlr, Rcfg) | Pint_acen);
@@ -923,7 +927,21 @@
int i, off = SiSeenodeaddr, cnt = sizeof ee.eaddr / sizeof(short);
ushort *shp = (ushort *)ee.eaddr;
- if(!is630(ctlr->id, ctlr->pcidev) || !sisrdcmos(ctlr)) {+ if(ctlr->id == SiS900 && ctlr->pcidev->rid == SiSrev635) {+ csr32w(ctlr, Rcr, csr32r(ctlr, Rcr) | Rld);
+ csr32w(ctlr, Rcr, csr32r(ctlr, Rcr) & ~Rld);
+ csr32w(ctlr, Rrfcr, csr32r(ctlr, Rrfcr) & ~Rfen);
+
+ csr32w(ctlr, Rrfcr, 0);
+ *shp++ = csr32r(ctlr, Rrfdr);
+ csr32w(ctlr, Rrfcr, 1<<16);
+ *shp++ = csr32r(ctlr, Rrfdr);
+ csr32w(ctlr, Rrfcr, 1<<17);
+ *shp = csr32r(ctlr, Rrfdr);
+
+ csr32w(ctlr, Rrfcr, csr32r(ctlr, Rrfcr) | Rfen);
+ memmove(ctlr->sromea, ee.eaddr, sizeof ctlr->sromea);
+ } else if(!is630(ctlr->id, ctlr->pcidev) || !sisrdcmos(ctlr)) {for (i = 0; i < cnt; i++)
*shp++ = eegetw(ctlr, off++);
memmove(ctlr->sromea, ee.eaddr, sizeof ctlr->sromea);
--- a/sys/src/9/pc/io.h
+++ b/sys/src/9/pc/io.h
@@ -218,19 +218,19 @@
/* capabilities */
enum {- PciCapPMG = 0x01, /* power management */
- PciCapAGP = 0x02,
- PciCapVPD = 0x03, /* vital product data */
- PciCapSID = 0x04, /* slot id */
- PciCapMSI = 0x05,
- PciCapCHS = 0x06, /* compact pci hot swap */
- PciCapPCIX = 0x07,
- PciCapHTC = 0x08, /* hypertransport irq conf */
- PciCapVND = 0x09, /* vendor specific information */
- PciCapPCIe = 0x10,
- PciCapMSIX = 0x11,
- PciCapSATA = 0x12,
- PciCapHSW = 0x0c, /* hot swap */
+ PciCapPMG = 0x01, /* power management */
+ PciCapAGP = 0x02,
+ PciCapVPD = 0x03, /* vital product data */
+ PciCapSID = 0x04, /* slot id */
+ PciCapMSI = 0x05,
+ PciCapCHS = 0x06, /* compact pci hot swap */
+ PciCapPCIX = 0x07,
+ PciCapHTC = 0x08, /* hypertransport irq conf */
+ PciCapVND = 0x09, /* vendor specific information */
+ PciCapPCIe = 0x10,
+ PciCapMSIX = 0x11,
+ PciCapSATA = 0x12,
+ PciCapHSW = 0x0c, /* hot swap */
};
typedef struct Pcisiz Pcisiz;
--
⑨