git: 9front

Download patch

ref: a3ef83a4cdf6f2e3575e9e1b7a8282ede59be789
parent: ee7264648b0046a2c77e2a2649429515bcb32bcd
author: Sigrid Solveig Haflínudóttir <sigrid@ftrv.se>
date: Fri Sep 2 12:12:04 EDT 2022 

imx8/lcd: disable the bridge output on blank

Disabling LCDIF often produces flickering output at the top
of the LCD panel (timings going wrong?). Instead, just disable the
output on the bridge, which is much simpler, doesn't seem to cause
any issues, and saves enough power just as well.


--- a/sys/src/9/imx8/lcd.c
+++ b/sys/src/9/imx8/lcd.c
@@ -356,11 +356,6 @@
 
 static u32int *lcdif = (u32int*)(VIRTIO + 0x320000);
 
-static struct {
-	Lock;
-	int blank;
-}lcdifirq;
-
 /* shift and mask */
 static u32int
 sm(u32int v, u32int m)
@@ -469,8 +464,7 @@
 	/* enable underflow recovery to fix image shift */
 	wr(lcdif, LCDIF_CTRL1,
 		sm(7, CTRL1_BYTE_PACKING_FORMAT) |
-		CTRL1_RECOVER_ON_UNDERFLOW |
-		CTRL1_CUR_FRAME_DONE_IRQ_EN);
+		CTRL1_RECOVER_ON_UNDERFLOW);
 
 	wr(lcdif, LCDIF_CTRL,
 		CTRL_BYPASS_COUNT |
@@ -834,35 +828,15 @@
 	gpioout(GPIO_PIN(1, 10), 1);
 }
 
-static void
-lcdifinterrupt(Ureg *, void *)
-{
-	wr(lcdif, LCDIF_CTRL1_CLR, CTRL1_CUR_FRAME_DONE_IRQ);
-	ilock(&lcdifirq);
-	if(lcdifirq.blank){
-		/* turn off dotclk */
-		wr(lcdif, LCDIF_CTRL_CLR, CTRL_DOTCLK_MODE);
-		/* wait for the fifo to empty */
-		while(rr(lcdif, LCDIF_CTRL) & CTRL_RUN)
-			;
-		lcdifirq.blank = 0;
-	}
-	iunlock(&lcdifirq);
-}
-
 void
 blankscreen(int blank)
 {
-	ilock(&lcdifirq);
-	lcdifirq.blank = blank;
-	if(blank == 0) /* restart lcdif */
-		wr(lcdif, LCDIF_CTRL_SET, CTRL_DOTCLK_MODE | CTRL_RUN);
-	iunlock(&lcdifirq);
-
-	/* toggle panel backlight */
+	/* panel backlight */
 	gpioout(GPIO_PIN(1, 10), blank == 0);
-	/* toggle PWM2 */
+	/* PWM2 */
 	mr(pwm2, PWMCR, (blank == 0)*CR_EN, CR_EN);
+	/* bridge output */
+	i2cwritebyte(i2cdev(i2cbus("i2c4"), 0x2c), 0x5a, blank == 0 ? 0x0d : 0x05);
 }
 
 static void
@@ -921,8 +895,6 @@
 	setclkgate("sim_display.mainclk", 1);
 
 	lcdifreset();
-
-	intrenable(IRQlcdif, lcdifinterrupt, nil, BUSUNKNOWN, "lcdif");
 
 	setclkrate("mipi.core", "system_pll1_div3", 266*Mhz);
 	setclkrate("mipi.CLKREF", "system_pll2_clk", 25*Mhz);
-- 
⑨