ref: c0224b2586bd7929cb78ef8f7cd9031476090c5d
parent: f9b4b7d725b195e94b7a7d72102e80ae55f35c34
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Wed Aug 21 14:28:01 EDT 2019
bcm: set XN bits for kernel device mappings
--- a/sys/src/9/bcm/arm.h
+++ b/sys/src/9/bcm/arm.h
@@ -290,6 +290,7 @@
#define L1wralloc (1<<12) /* L1 TEX */
#define L1sharable (1<<16)
+#define L1noexec (1<<4)
#define L2wralloc (1<<6) /* L2 TEX (small pages) */
#define L2sharable (1<<10)
--- a/sys/src/9/bcm/mmu.c
+++ b/sys/src/9/bcm/mmu.c
@@ -51,12 +51,12 @@
*/
va = soc.virtio;
for(pa = soc.physio; pa < soc.physio+soc.iosize; pa += MiB){- l1[L1X(va)] = pa|Dom0|L1AP(Krw)|Section;
+ l1[L1X(va)] = pa|Dom0|L1AP(Krw)|Section|L1noexec;
va += MiB;
}
pa = soc.armlocal;
if(pa)
- l1[L1X(va)] = pa|Dom0|L1AP(Krw)|Section;
+ l1[L1X(va)] = pa|Dom0|L1AP(Krw)|Section|L1noexec;
/*
* double map exception vectors near top of virtual memory
@@ -326,7 +326,7 @@
return 0;
pte = pte0;
for(n = 0; n < size; n += MiB){- *pte++ = (pa+n)|Dom0|L1AP(Krw)|Section;
+ *pte++ = (pa+n)|Dom0|L1AP(Krw)|Section|L1noexec;
mmuinvalidateaddr(va+n);
}
cachedwbtlb(pte0, (uintptr)pte - (uintptr)pte0);
--
⑨