ref: c9f5a30d9d4510a2284303c6dfbc0f0dbe3444c5
parent: 5ee7bf704c90dbf0fde72eb2df66037308886e4a
parent: 3a606d896c2a6905f5c25ed74b0dcda663caf4b4
author: cinap_lenrek <cinap_lenrek@gmx.de>
date: Thu Jun 20 22:49:33 EDT 2013
merge
--- a/sys/man/8/plan9.ini
+++ b/sys/man/8/plan9.ini
@@ -720,11 +720,6 @@
Prints a summary of the multiprocessor APIC interrupt configuration.
.SS \fL*nomsi=\fP
Disables message signaled interrupts.
-.SS \fL*notsc=\fP
-Disables the use of the per processor timestamp counter registers
-as high resolution clock. This option is intended for machines where
-the timestamp counter rate is not constant across cores or is adjusted
-dynamically by power management.
.SS \fL*pcimaxbno=value\fP
This puts a limit on the maximum bus number probed
on a PCI bus (default 7).
--- a/sys/src/9/pc/devarch.c
+++ b/sys/src/9/pc/devarch.c
@@ -797,7 +797,7 @@
/*
* if there is one, set tsc to a known value
*/
- if((m->cpuiddx & Tsc) != 0 && getconf("*notsc") == nil){+ if(m->cpuiddx & Tsc){m->havetsc = 1;
cycles = _cycles;
if(m->cpuiddx & Cpumsr)
--
⑨