git: 9front

Download patch

ref: d26db8e10838176540f08c91a221a1153b771a4e
parent: ed0fa0e48e578ae791e939d89191683ff6a8c30d
author: cinap_lenrek <cinap_lenrek@gmx.de>
date: Fri Aug 17 00:03:51 EDT 2012 

pckernel: use constants instead of hardcoding cpuid bits in various places


--- a/sys/src/9/pc/dat.h
+++ b/sys/src/9/pc/dat.h
@@ -283,7 +283,8 @@
 
 	/* dx */
 	Fpuonchip = 1<<0,
-//	Pse	= 1<<3,		/* page size extensions */
+	Vmex	= 1<<1,		/* virtual-mode extensions */
+	Pse	= 1<<3,		/* page size extensions */
 	Tsc	= 1<<4,		/* time-stamp counter */
 	Cpumsr	= 1<<5,		/* model-specific registers, rdmsr/wrmsr */
 	Pae	= 1<<6,		/* physical-addr extensions */
@@ -292,7 +293,7 @@
 	Cpuapic	= 1<<9,
 	Mtrr	= 1<<12,	/* memory-type range regs.  */
 	Pge	= 1<<13,	/* page global extension */
-//	Pse2	= 1<<17,	/* more page size extensions */
+	Pse2	= 1<<17,	/* more page size extensions */
 	Clflush = 1<<19,
 	Acpif	= 1<<22,	/* therm control msr */
 	Mmx	= 1<<23,
--- a/sys/src/9/pc/devarch.c
+++ b/sys/src/9/pc/devarch.c
@@ -809,9 +809,9 @@
 	 * are supported enable them in CR4 and clear any other set extensions.
 	 * If machine check was enabled clear out any lingering status.
 	 */
-	if(m->cpuiddx & (Pge|Mce|0x8)){
+	if(m->cpuiddx & (Pge|Mce|Pse)){
 		cr4 = 0;
-		if(m->cpuiddx & 0x08)
+		if(m->cpuiddx & Pse)
 			cr4 |= 0x10;		/* page size extensions */
 		if(p = getconf("*nomce"))
 			nomce = strtoul(p, 0, 0);
--- a/sys/src/9/pc/main.c
+++ b/sys/src/9/pc/main.c
@@ -523,7 +523,7 @@
 	 *  a write cycle to port 0xF0 clears the interrupt latch attached
 	 *  to the error# line from the 387
 	 */
-	if(!(m->cpuiddx & 0x01))
+	if(!(m->cpuiddx & Fpuonchip))
 		outb(0xF0, 0xFF);
 
 	/*
--- a/sys/src/9/pc/memory.c
+++ b/sys/src/9/pc/memory.c
@@ -473,9 +473,9 @@
 			table = &m->pdb[PDX(KADDR(pa - 4*MB))];
 			if(nvalid[MemUPA] == (4*MB)/BY2PG)
 				*table = 0;
-			else if(nvalid[MemRAM] == (4*MB)/BY2PG && (m->cpuiddx & 0x08))
+			else if(nvalid[MemRAM] == (4*MB)/BY2PG && (m->cpuiddx & Pse))
 				*table = (pa - 4*MB)|PTESIZE|PTEWRITE|PTEVALID;
-			else if(nvalid[MemUMB] == (4*MB)/BY2PG && (m->cpuiddx & 0x08))
+			else if(nvalid[MemUMB] == (4*MB)/BY2PG && (m->cpuiddx & Pse))
 				*table = (pa - 4*MB)|PTESIZE|PTEWRITE|PTEUNCACHED|PTEVALID;
 			else{
 				*table = map|PTEWRITE|PTEVALID;
--- a/sys/src/9/pc/mmu.c
+++ b/sys/src/9/pc/mmu.c
@@ -712,7 +712,7 @@
 	flag = pa&0xFFF;
 	pa &= ~0xFFF;
 
-	if((MACHP(0)->cpuiddx & 0x08) && (getcr4() & 0x10))
+	if((MACHP(0)->cpuiddx & Pse) && (getcr4() & 0x10))
 		pse = 1;
 	else
 		pse = 0;
--- a/sys/src/9/pc/mp.c
+++ b/sys/src/9/pc/mp.c
@@ -99,7 +99,7 @@
 	/*
 	 * If there are MTRR registers, snarf them for validation.
 	 */
-	if(!(m->cpuiddx & 0x1000))
+	if(!(m->cpuiddx & Mtrr))
 		return;
 
 	rdmsr(0x0FE, &m->mtrrcap);
--- a/sys/src/9/pc/trap.c
+++ b/sys/src/9/pc/trap.c
@@ -535,9 +535,9 @@
 	 */
 	iprint("  CR0 %8.8lux CR2 %8.8lux CR3 %8.8lux",
 		getcr0(), getcr2(), getcr3());
-	if(m->cpuiddx & 0x9A){
+	if(m->cpuiddx & (Mce|Tsc|Pse|Vmex)){
 		iprint(" CR4 %8.8lux", getcr4());
-		if((m->cpuiddx & 0xA0) == 0xA0){
+		if((m->cpuiddx & (Mce|Cpumsr)) == (Mce|Cpumsr)){
 			rdmsr(0x00, &mca);
 			rdmsr(0x01, &mct);
 			iprint("\n  MCA %8.8llux MCT %8.8llux", mca, mct);
-- 
⑨