ref: db7834b8b36994623fd424dc55feed9ba477fe69
parent: 1569edc8dfb4779af4e558ea7b2c4732f0f69294
author: aiju <aiju@phicode.de>
date: Tue May 17 12:51:30 EDT 2011
added support for 32 bit MSI
--- a/sys/src/9/pc/mp.c
+++ b/sys/src/9/pc/mp.c
@@ -883,13 +883,14 @@
enum {MSICtrl = 0x02, /* message control register (16 bit) */
MSIAddr = 0x04, /* message address register (64 bit) */
- MSIData = 0x0C, /* message data register (16 bit) */
+ MSIData32 = 0x08, /* message data register for 32 bit MSI (16 bit) */
+ MSIData64 = 0x0C, /* message data register for 64 bit MSI (16 bit) */
};
static int
msiintrenable(Vctl *v)
{- int tbdf, vno, cap, cpu;
+ int tbdf, vno, cap, cpu, ok64;
Pcidev *pci;
if(getconf("*msi") == nil)@@ -913,9 +914,10 @@
vno = allocvector();
cpu = mpintrcpu();
+ ok64 = (pcicfgr16(pci, cap + MSICtrl) & (1<<7)) != 0;
pcicfgw32(pci, cap + MSIAddr, (0xFEE << 20) | (cpu << 12));
- pcicfgw32(pci, cap + MSIAddr + 4, 0);
- pcicfgw16(pci, cap + MSIData, vno | (1<<14));
+ if(ok64) pcicfgw32(pci, cap + MSIAddr + 4, 0);
+ pcicfgw16(pci, cap + ok64 ? MSIData64 : MSIData32, vno | (1<<14));
pcicfgw16(pci, cap + MSICtrl, 1);
print("msiintrenable: success with tbdf %.8x, vector %d, cpu %d\n", tbdf, vno, cpu);v->isr = lapicisr;
--
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