code: plan9front

Download patch

ref: 2d8adc7b881f20a8cc2dbccab84fc7e1655752a6
parent: 566c3ca2de98761f9039e49ca5f68ee1a9ad73c4
author: Ori Bernstein <ori@eigenstate.org>
date: Mon Feb 8 11:07:09 EST 2021

ape/lib9: sync arm getfcr.s implementation

The arm assembler supports movw to handle
getfcr and setfcr now, no need to hack it
with macros; sync from plan9 libc.

--- a/sys/src/ape/lib/9/arm/getfcr.s
+++ b/sys/src/ape/lib/9/arm/getfcr.s
@@ -1,16 +1,21 @@
+/* for VFP */
+#define VMRS(fp, cpu) WORD $(0xeef00a10 | (fp)<<16 | (cpu)<<12) /* FP → arm */
+#define VMSR(cpu, fp) WORD $(0xeee00a10 | (fp)<<16 | (cpu)<<12) /* arm → FP */
 
-TEXT	setfcr(SB), $4
-	MOVW	R0, FPCR
+#define Fpscr 1
+
+TEXT	setfcr(SB), $0
+	VMSR(0, Fpscr)
 	RET
 
-TEXT	getfcr(SB), $4
-	MOVW	FPCR, R0
+TEXT	getfcr(SB), $0
+	VMRS(Fpscr, 0)
 	RET
 
 TEXT	getfsr(SB), $0
-	MOVW	FPSR, R0
+	VMSR(0, Fpscr)
 	RET
 
 TEXT	setfsr(SB), $0
-	MOVW	R0, FPSR
+	VMRS(Fpscr, 0)
 	RET