code: plan9front

Download patch

ref: 39aabc9f7a14427fed2bc22474fef1681de726d2
parent: a78b71b143240fa1dad019f5c655a03c2d2400d9
author: Sigrid Solveig Haflínudóttir <sigrid@ftrv.se>
date: Sun Aug 21 03:46:15 EDT 2022

reform: tweak manpage and reform/audio a bit

--- a/sys/man/1/reform
+++ b/sys/man/1/reform
@@ -34,7 +34,7 @@
 ]
 .SH DESCRIPTION
 These programs provide support for certain functions of MNT Reform 2
-computing device make controlling file systems available under
+computing device and make controlling file systems available under
 .BR /dev .
 .PP
 .SS Audio
@@ -56,7 +56,7 @@
 .I off )
 of the three "outputs" -
 .BR master ,
-.BR hp
+.B hp
 and
 .BR spk .
 Each can be enabled, disabled or toggled, by writing a single line to
@@ -75,7 +75,13 @@
 ease of use,
 .B volume
 supports relative adjustments by prefixing a number with a sign.
-.IP
+\fImaster +1\fR, for example, will increase the volume on
+.B master
+by 1%, which is 0.5dB for this particular output. For
+.B hp
+and
+.B spk
+one percent is 1dB.
 .IP
 Enhanced stereo separation can be enabled by writing
 .BR 3d ,
--- a/sys/src/cmd/reform/audio.c
+++ b/sys/src/cmd/reform/audio.c
@@ -111,14 +111,14 @@
 	/*
 	 * getting DAC ready for s16c2r44100:
 	 *
-	 * mclk₀ = 25Mhz (set in sai)
+	 * f₁ = mclk₀ = 25Mhz (set in sai)
 	 * pllprescale = /2 → *actual* mclk₁ is 25/2 = 12.5Mhz
 	 * sysclk = 44.1kHz*256 = 11.2896Mhz
 	 *   → dacdiv = /(1*256) = sysclk/(1*256) = 44.1kHz
 	 * f₂ = 4*2*sysclk = 90.3168Mhz
 	 *
-	 * PLL freq ration:
-	 *   R = f₂/mclk₁
+	 * PLL freq:
+	 *   R = f₂/f₁
 	 *   N = int(R) = 7
 	 *   K = 2²⁴*(R-N) = 3780644.9623
 	 *
@@ -178,8 +178,6 @@
 
 	wr(0x07, 1<<6 | 2); /* master mode; i²s, 16-bit words */
 
-	wr(0x17, 1<<8 | 3<<6 | 0<<1); /* thermal shutdown on; avdd=3.3v; slow clock on */
-
 	wr(0x06, 1<<3 | 1<<2); /* ramp up DAC volume slowly */
 	wr(0x2f, 3<<2); /* output mixer on */
 	wr(0x22, 1<<8); /* L DAC to mixer */
@@ -193,7 +191,7 @@
 	wr(0x19, 1<<7 | 1<<6); /* Vref on */
 
 	wr(0x09, 1<<6); /* adclrc → gpio (for jack detect output) */
-	wr(0x30, 3<<4 | 2<<2 | 1<<1); /* JD2 jack detect in; Tsense on */
+	wr(0x30, 3<<4 | 2<<2 | 1<<1); /* gpio jack detect out; JD2 jack detect in; Tsense on */
 	wr(0x1b, 1<<3); /* HP_[LR] responsive to jack detect */
 	wr(0x18, 1<<6); /* HP switch on; high = HP */