shithub: plan9front

Download patch

ref: 524f8c2d5374e34bbb665e7a52484859ae9e3e59
parent: c14962657cff151be8bf805f92c13f0323b4b3b7
author: cinap_lenrek <cinap_lenrek@felloff.net>
date: Sat Jun 18 08:49:29 EDT 2022

imx8/lcd: set iomux pad configuration

--- a/sys/src/9/imx8/lcd.c	Sat Jun 18 08:49:04 2022
+++ b/sys/src/9/imx8/lcd.c	Sat Jun 18 08:49:29 2022
@@ -790,8 +790,14 @@
 static void
 backlighton(void)
 {
+	/* gpio1_io10: for panel backlight enable */
+	iomuxpad("pad_gpio1_io10", "gpio1_io10", "~LVTTL ~HYS ~PUE ~ODE FAST 45_OHM");
+
+	/* gpio1_io10 low: panel backlight off */
+	gpioout(GPIO_PIN(1, 10), 0);
+
 	/* pwm2_out: for panel backlight */
-	iomuxpad("pad_spdif_rx", "pwm2_out", nil);
+	iomuxpad("pad_spdif_rx", "pwm2_out", "~LVTTL ~HYS ~PUE ~ODE FAST 45_OHM");
 
 	setclkrate("pwm2.ipg_clk_high_freq", "osc_25m_ref_clk", Pwmsrcclk);
 	setclkgate("pwm2.ipg_clk_high_freq", 1);
@@ -801,6 +807,9 @@
 	wr(pwm2, PWMSAR, Pwmsrcclk/150000);
 	wr(pwm2, PWMPR, (Pwmsrcclk/100000)-2);
 	mr(pwm2, PWMCR, CR_EN, CR_EN);
+
+	/* gpio1_io10 high: panel backlight on */
+	gpioout(GPIO_PIN(1, 10), 1);
 }
 
 void
@@ -814,19 +823,10 @@
 	/* GPR13[MIPI_MUX_SEL]: 0 = LCDIF, 1 = DCSS */
 	iomuxgpr(13, 0, 1<<2);
 
-	/* gpio3_io20: sn65dsi86 bridge */
-	iomuxpad("pad_sai5_rxc", "gpio3_io20", nil);
-
-	/* gpio1_io10: for panel */
-	iomuxpad("pad_gpio1_io10", "gpio1_io10", nil);	
-	
-	/* gpio1_io10 low: panel off */
-	gpioout(GPIO_PIN(1, 10), 0);
-
 	backlighton();
 
-	/* gpio1_io10 high: panel on */
-	gpioout(GPIO_PIN(1, 10), 1);
+	/* gpio3_io20: sn65dsi86 bridge enable */
+	iomuxpad("pad_sai5_rxc", "gpio3_io20", "~LVTTL ~HYS ~PUE ~ODE FAST 45_OHM");	
 
 	/* gpio3_io20 high: bridge on */
 	gpioout(GPIO_PIN(3, 20), 1);