ref: ed147e0d61ce066a1c18bae4d0ec0dc0a9b90280
parent: 6bb619c8db2867ddd9cd19c0aec05065f5ee0cae
author: 9ferno <gophone2015@gmail.com>
date: Wed Oct 13 14:54:11 EDT 2021
cleaned up debugging prints
--- a/mkfile
+++ b/mkfile
@@ -251,8 +251,8 @@
@{rfork nmk binds
{ echo 'console=0 b115200'- echo '*dumpmp=1'
- echo '*apicdebug=1'
+ #echo '*dumpmp=1'
+ #echo '*apicdebug=1'
#echo '*nomp=1'
grep -v '^bootfile=' /n/src9/os/pc/plan9.ini
#echo 'bootfile='^`{echo $kernel | sed 's!^/n/src9!!'}--- a/os/pc/apic.c
+++ b/os/pc/apic.c
@@ -7,6 +7,8 @@
#include "mp.h"
+#define DP if(1){}else print+
enum { /* Local APIC registers */LapicID = 0x0020, /* ID */
LapicVER = 0x0030, /* Version */
@@ -202,7 +204,7 @@
lapicw(LapicTDCR, lapictdxtab[a->tdx]);
lapicw(LapicTPR, 0);
- showlapicregisters();
+ /* showlapicregisters(); */
}
/*
@@ -253,7 +255,7 @@
splx(s);
v = (v+500000LL)/1000000LL;
- print("cpu%d: lapic clock at %lludMHz\n", m->machno, v);+ DP("cpu%d: lapic clock at %lludMHz\n", m->machno, v);}
void
@@ -274,7 +276,7 @@
dfr = 0xffffffff;
ldr = 0x00000000;
-print("lapicinit LapicID ID 0x%lux apic->machno 0x%d\n", lapicr(LapicID), apic->machno);+ DP("lapicinit LapicID ID 0x%lux apic->machno 0x%d\n", lapicr(LapicID), apic->machno);lapicw(LapicDFR, dfr);
lapicw(LapicLDR, ldr);
lapicw(LapicTPR, 0xff);
@@ -305,7 +307,7 @@
lapiceoi(0);
lvt = (lapicr(LapicVER)>>16) & 0xFF;
-print("lapicinit LapicVER Version 0x%lux\n", lvt);+ DP("lapicinit LapicVER Version 0x%lux\n", lvt);if(lvt >= 4)
lapicw(LapicPCINT, ApicIMASK);
lapicw(LapicERROR, VectorPIC+IrqERROR);
@@ -336,28 +338,29 @@
int i;
ulong crhi;
- showlapicregisters();
-print("lapicstartap v 0x%x\n", v);+ /* showlapicregisters(); */
/* make apic's processor do a warm reset */
crhi = apic->apicno<<24;
lapicw(LapicICRHI, crhi);
lapicw(LapicICRLO, LapicFIELD|ApicLEVEL|LapicASSERT|ApicINIT);
-print("lapicstartap LapicFIELD|ApicLEVEL|LapicASSERT|ApicINIT 0x%ux\n", LapicFIELD|ApicLEVEL|LapicASSERT|ApicINIT);+ DP("lapicstartap LapicFIELD|ApicLEVEL|LapicASSERT|ApicINIT 0x%ux\n",+ LapicFIELD|ApicLEVEL|LapicASSERT|ApicINIT);
microdelay(200);
lapicw(LapicICRLO, LapicFIELD|ApicLEVEL|LapicDEASSERT|ApicINIT);
delay(10);
-print("lapicstartap LapicID ID 0x%lux apic->machno 0x%d\n", lapicr(LapicID), apic->machno);+ DP("lapicstartap LapicID ID 0x%lux apic->machno 0x%d\n", lapicr(LapicID), apic->machno);/* assumes apic is not an 82489dx */
for(i = 0; i < 2; i++){lapicw(LapicICRHI, crhi);
/* make apic's processor start at v in real mode */
lapicw(LapicICRLO, LapicFIELD|ApicEDGE|ApicSTARTUP|(v/BY2PG));
-print("lapicstartap LapicFIELD|ApicEDGE|ApicSTARTUP|(v/BY2PG) 0x%zux\n", LapicFIELD|ApicEDGE|ApicSTARTUP|(v/BY2PG));+ DP("lapicstartap LapicFIELD|ApicEDGE|ApicSTARTUP|(v/BY2PG) 0x%zux\n",+ LapicFIELD|ApicEDGE|ApicSTARTUP|(v/BY2PG));
microdelay(200);
}
-print("lapicstartap apic->machno %d after the for loop\n", apic->machno);- showlapicregisters();
+ DP("lapicstartap apic->machno %d after the for loop\n", apic->machno);+ /* showlapicregisters(); */
}
void
@@ -454,7 +457,7 @@
* Make sure interrupts are all masked off for now.
*/
iowin = apic->addr+(0x10/sizeof(ulong));
-print("ioapicinit apic->addr 0x%p iowin 0x%p\n", apic->addr, iowin);+ DP("ioapicinit apic->addr 0x%p iowin 0x%p\n", apic->addr, iowin);lock(apic);
*apic->addr = IoapicVER;
apic->mre = (*iowin>>16) & 0xFF;
@@ -463,7 +466,7 @@
*iowin = apicno<<24;
unlock(apic);
-print("ioapicinit *iowin 0x%ux\n", *iowin);+ DP("ioapicinit *iowin 0x%ux\n", *iowin);hi = 0;
lo = ApicIMASK;
for(v = 0; v <= apic->mre; v++)
--- a/os/pc/archacpi.c
+++ b/os/pc/archacpi.c
@@ -11,6 +11,8 @@
#include <aml.h>
+#define DP if(1){}else print+
typedef struct Rsd Rsd;
typedef struct Tbl Tbl;
@@ -112,7 +114,7 @@
Tbl *t;
int i;
-print("maptable pa 0x%p\n", pa);+ DP("maptable pa 0x%p\n", pa);if(-pa < 8)
return;
@@ -132,11 +134,11 @@
if(l < Tblsz
|| l >= 0x10000000
|| -pa < l){-print("mptable vunmap t 0x%p\n", t);+ DP("mptable vunmap t 0x%p\n", t);vunmap(t, 8);
return;
}
-print("mptable memreserve pa 0x%p l 0x%d\n", pa, l);+ DP("mptable memreserve pa 0x%p l 0x%d\n", pa, l);memreserve(pa, l);
vunmap(t, 8);
if((t = vmap(pa, l)) == nil)
@@ -147,25 +149,23 @@
}
tblmap[ntblmap++] = t;
-print("mptable ntblmap 0x%d\n", ntblmap);+ DP("mptable ntblmap 0x%d\n", ntblmap);p = (uchar*)t;
e = p + l;
if(memcmp("RSDT", t->sig, 4) == 0){-print("mptable RSDT\n");+ DP("mptable RSDT\n");for(p = t->data; p+3 < e; p += 4)
maptable(get32(p));
-print("mptable exiting RSDT\n");return;
}
if(memcmp("XSDT", t->sig, 4) == 0){-print("mptable XSDT\n");+ DP("mptable XSDT\n");for(p = t->data; p+7 < e; p += 8)
maptable(get64(p));
-print("mptable exiting XSDT\n");return;
}
if(memcmp("FACP", t->sig, 4) == 0){-print("mptable FACP\n");+ DP("mptable FACP\n");if(l < 44)
return;
maptable(get32(p + 40));
@@ -589,11 +589,10 @@
ulong lapicbase;
int machno, i, c;
-print("acpiinit: before amlinit\n");amlinit();
/* load DSDT */
-print("acpiinit: load DSDT\n");+ DP("acpiinit: load DSDT\n"); if((t = findtable("DSDT")) != nil){amlintmask = (~0ULL) >> (t->rev <= 1)*32;
amlload(t->data, tbldlen(t));
@@ -600,7 +599,7 @@
}
/* load SSDT, there can be multiple tables */
-print("acpiinit: load SSDT\n");+ DP("acpiinit: load SSDT\n"); for(i=0; i<ntblmap; i++){t = tblmap[i];
if(memcmp(t->sig, "SSDT", 4) == 0)
@@ -608,28 +607,28 @@
}
/* set APIC mode */
-print("acpiinit: set APIC mode\n");+ DP("acpiinit: set APIC mode\n");amleval(amlwalk(amlroot, "_PIC"), "i", 1, nil);
t = findtable("APIC");if(t == nil)
panic("acpiinit: no MADT (APIC) table");-print("acpiinit: found APIC\n");+ DP("acpiinit: found APIC\n");s = t->data;
e = s + tbldlen(t);
lapicbase = get32(s); s += 8;
-print("acpiinit: lapicbase 0x%lux\n", lapicbase);+ DP("acpiinit: lapicbase 0x%lux\n", lapicbase);va = vmap(lapicbase, 1024);
- print("LAPIC: %.8lux %#p\n", lapicbase, va);+ DP("LAPIC: %.8lux %#p\n", lapicbase, va);if(va == nil)
panic("acpiinit: cannot map lapic %.8lux", lapicbase);- print("t->data:");+ /* print("t->data:"); for(p = s; p < e; p ++){ print(" %x", *p);}
- print("\n");+ print("\n"); */machno = 0;
for(p = s; p < e; p += c){c = p[1];
@@ -637,7 +636,7 @@
break;
switch(*p){case 0x00: /* Processor Local APIC */
-print("acpiinit Processor Local APIC p[3] %d MaxAPICNO %d\n", p[3], MaxAPICNO);+ DP("acpiinit Processor Local APIC p[3] %d MaxAPICNO %d\n", p[3], MaxAPICNO);if(p[3] > MaxAPICNO)
break;
if((a = xalloc(sizeof(Apic))) == nil)
@@ -652,7 +651,8 @@
/* skip disabled processors */
if((a->flags & PcmpEN) == 0 || mpapic[a->apicno] != nil){-print("acpiinit disabled processor a->flags & PcmpEN 0x%x mpapic[a->apicno] 0x%p\n", a->flags & PcmpEN, mpapic[a->apicno]);+ DP("acpiinit disabled processor a->flags & PcmpEN 0x%x mpapic[a->apicno] 0x%p\n",+ a->flags & PcmpEN, mpapic[a->apicno]);
xfree(a);
break;
}
@@ -666,11 +666,11 @@
a->flags |= PcmpBP;
mpapic[a->apicno] = a;
- print("acpinit LAPIC%d: pa=%lux va=%#p flags=%x\n",+ DP("acpinit LAPIC%d: pa=%lux va=%#p flags=%x\n",a->apicno, a->paddr, a->addr, a->flags);
break;
case 0x01: /* I/O APIC */
-print("acpiinit Processor I/O APIC p[2] %d MaxAPICNO %d\n", p[2], MaxAPICNO);+ DP("acpiinit Processor I/O APIC p[2] %d MaxAPICNO %d\n", p[2], MaxAPICNO);if(p[2] > MaxAPICNO)
break;
if((a = xalloc(sizeof(Apic))) == nil)
@@ -683,14 +683,12 @@
a->gsibase = get32(p+8);
a->flags = PcmpEN;
mpioapic[a->apicno] = a;
-print("acpiinit ioapicinit\n");ioapicinit(a, a->apicno);
break;
}
}
-print("after initialization\n");- for(i=0; i<=MaxAPICNO; i++){+/* for(i=0; i<=MaxAPICNO; i++){if(apic = mpapic[i])
print("LAPIC%d: pa=%lux va=%#p flags=%x\n",i, apic->paddr, apic->addr, apic->flags);
@@ -697,7 +695,7 @@
if(apic = mpioapic[i])
print("IOAPIC%d: pa=%lux va=%#p flags=%x gsibase=%d mre=%d\n",i, apic->paddr, apic->addr, apic->flags, apic->gsibase, apic->mre);
- }
+ }*/
/*
* need 2nd pass as vbox puts interrupt overrides
* *before* the ioapic entries (!)
@@ -724,20 +722,16 @@
}
}
-print("acpiinit: embedded controller\n");/* find embedded controller */
amlenum(amlroot, "_HID", enumec, nil);
/* look for PCI interrupt mappings */
-print("acpiinit: interrupt mappings\n");amlenum(amlroot, "_PRT", enumprt, nil);
/* add identity mapped legacy isa interrupts */
-print("acpiinit: legacy isa interrupts\n");for(i=0; i<16; i++)
addirq(i, BusISA, 0, i, 0);
-print("acpiinit: free aml\n");/* free the AML interpreter */
amlexit();
@@ -744,7 +738,6 @@
/*
* Ininitalize local APIC and start application processors.
*/
-print("acpiinit: calling mpinit\n");mpinit();
}
@@ -843,21 +836,15 @@
if(rsd == nil)
return 1;
if(checksum(rsd, 20) && checksum(rsd, 36)){-print("checksum(rsd, 20) && checksum(rsd, 36) unmatched\n");return 1;
}
-print("archacpi identify: maptables()\n");maptables();
-print("archacpi identify: after maptables()\n"); addarchfile("acpitbls", 0444, readtbls, nil); addarchfile("acpimem", 0600, readmem, writemem);-print("archacpi identify: findtable APIC()\n"); if(v == 0 || findtable("APIC") == nil){-print("v == 0 || findtable(APIC) == nil\n");return 1;
}
if((cp = getconf("*nomp")) != nil && strcmp(cp, "0") != 0){-print("(cp = getconf(*nomp)) != nil && strcmp(cp, 0) != 0\n");return 1;
}
if(getconf("*nohpet") == nil@@ -867,10 +854,8 @@
archacpi.clockinit = hpetinit;
archacpi.fastclock = hpetread;
}
-print("archacpi identify: after hpet\n"); if(m->havetsc && getconf("*notsc") == nil)archacpi.fastclock = tscticks;
-print("archacpi identify: after notsc\n");return 0;
}
--- a/os/pc/archmp.c
+++ b/os/pc/archmp.c
@@ -389,9 +389,7 @@
_MP_ *_mp_;
ulong pa, len;
-print("archmp.c: identify\n"); if((cp = getconf("*nomp")) != nil && strcmp(cp, "0") != 0){-print("archmp.c: identify *nomp != nil\n");return 1;
}
@@ -403,11 +401,9 @@
* To do: check extended table checksum.
*/
if((_mp_ = sigsearch("_MP_", _MP_sz)) == nil || _mp_->physaddr == 0){-print("archmp.c: identify sigsearch _MP_ not found\n");return 1;
}
-print("archmp sigsearch found _mp_ 0x%p\n", _mp_);len = PCMPsz;
pa = _mp_->physaddr;
if(pa + len-1 < pa)
@@ -434,7 +430,6 @@
if(checksum(pcmp, len) != 0)
goto Bad;
-print("archmp identify after checksum\n"); if(m->havetsc && getconf("*notsc") == nil)archmp.fastclock = tscticks;
--- a/os/pc/devarch.c
+++ b/os/pc/devarch.c
@@ -856,13 +856,10 @@
arch = knownarch[0];
for(p = knownarch; *p != nil; p++){-print("archinit checking %s .. ", (*p)->id); if((*p)->ident != nil && (*p)->ident() == 0){-print(" identified\n");arch = *p;
break;
}
-print(" not identified\n");}
if(arch != knownarch[0]){if(arch->id == nil)
@@ -876,7 +873,6 @@
if(arch->clockinit == nil)
arch->clockinit = knownarch[0]->clockinit;
}
-print("archinit id %s\n", arch->id);/*
* Decide whether to use copy-on-reference (386 and mp).
* We get another chance to set it in mpinit() for a
--- a/os/pc/mp.c
+++ b/os/pc/mp.c
@@ -10,6 +10,7 @@
#include "mp.h"
#include "apbootstrap.i"
+#define DP if(1){}else printextern void i8259init(void);
/* filled in by pcmpinit or acpiinit */
@@ -165,16 +166,12 @@
Apic *apic;
char *cp;
-print("mpinit\n");- showglobalconfig();
+ /* showglobalconfig(); */
i8259init();
-print("mpinit i8259init\n");syncclock();
-print("mpinit after syncclock getconf(*apicdebug) %s\n", getconf("*apicdebug"));+ DP("mpinit after syncclock getconf(*apicdebug) %s\n", getconf("*apicdebug"));-/* system trap handlers work here, interrupt vectors are working? */
-
- if(getconf("*apicdebug") || 1){+ if(getconf("*apicdebug")){Bus *b;
Aintr *ai;
PCMPintr *pi;
@@ -197,7 +194,6 @@
}
}
}
-print("mpinit after apicdebug\n");apic = nil;
for(i=0; i<=MaxAPICNO; i++){@@ -216,8 +212,7 @@
apic->online = 1;
lapicinit(apic);
-print("mpinit after lapicinit\n");-lapicerror(nil,nil);
+ /* lapicerror(nil,nil); */
/*
* These interrupts are local to the processor
@@ -228,8 +223,7 @@
intrenable(IrqERROR, lapicerror, 0, BUSUNKNOWN, "lapicerror");
intrenable(IrqSPURIOUS, lapicspurious, 0, BUSUNKNOWN, "lapicspurious");
lapiconline();
-print("mpinit after lapiconline\n");-lapicerror(nil,nil);
+ /* lapicerror(nil,nil); */
/*
* Initialise the application processors.
@@ -246,10 +240,12 @@
if(sizeof(apbootstrap) > 4*KiB)
print("mpinit: sizeof(apbootstrap) 0x%x > 4*KiB -- fix it\n", sizeof(apbootstrap));memmove((void*)APBOOTSTRAP, apbootstrap, sizeof(apbootstrap));
-for(i=0;i<sizeof(apbootstrap);i++){- print(" %x", *((uchar*)APBOOTSTRAP+i));-}
-print("\n");+ /*
+ for(i=0;i<sizeof(apbootstrap);i++){+ DP(" %x", *((uchar*)APBOOTSTRAP+i));+ }
+ DP("\n");+ */
for(i=0; i<nelem(mpapic); i++){if((apic = mpapic[i]) == nil)
continue;
@@ -263,7 +259,6 @@
ncpu--;
}
}
-print("mpinit after mpstartap\n");/*
* we don't really know the number of processors till
--- a/os/pc/trap.c
+++ b/os/pc/trap.c
@@ -341,10 +341,10 @@
mach = MACHP(i);
if(m->machno == mach->machno)
continue;
- print(" cpu%d: last %d",- mach->machno, mach->lastintr);
+ /* print(" cpu%d: last %d",+ mach->machno, mach->lastintr) */;
}
- print("\n");+ /* print("\n"); */}
m->spuriousintr++;
return;
--- a/os/pc64/memory.c
+++ b/os/pc64/memory.c
@@ -63,7 +63,7 @@
{uintptr flags;
- print("mapkzero base 0x%p len %llud 0x%llux type 0x%x\n",+ DP("mapkzero base 0x%p len %llud 0x%llux type 0x%x\n",base, len, len, type);
if(base < MemMin && base+len > MemMin){mapkzero(base, MemMin-base, type);
@@ -467,25 +467,25 @@
/* do not bother allocating page tables for UPA.
* UPA users call vmap() to do that.
*/
-print("e820scan building page tables for the kernel to work\n");+ DP("e820scan building page tables for the kernel to work\n"); for(base = memmapnext(-1, MemRAM); base != -1; base = memmapnext(base, MemRAM)){size = memmapsize(base, BY2PG) & ~(BY2PG-1);
if(size != 0)
mapkzero(PGROUND(base), size, MemRAM);
}
-print("e820scan building page tables after RAM\n");+ DP("e820scan building page tables after RAM\n"); for(base = memmapnext(-1, MemUMB); base != -1; base = memmapnext(base, MemUMB)){size = memmapsize(base, BY2PG) & ~(BY2PG-1);
if(size != 0)
mapkzero(PGROUND(base), size, MemUMB);
}
-print("e820scan building page tables after UMB\n");+ DP("e820scan building page tables after UMB\n"); for(base = memmapnext(-1, MemACPI); base != -1; base = memmapnext(base, MemACPI)){size = memmapsize(base, BY2PG) & ~(BY2PG-1);
if(size != 0)
mapkzero(PGROUND(base), size, MemACPI);
}
-print("e820scan building page tables after ACPI\n");+ DP("e820scan building page tables after ACPI\n");return 0;
}
@@ -738,11 +738,11 @@
mapkzero(PGROUND(base), size, MemUMB);
}
- memmapdump();
+ /* memmapdump(); */
cm = &conf.mem[0];
for(base = memmapnext(-1, MemRAM); base != -1; base = memmapnext(base, MemRAM)){size = memmapsize(base, BY2PG) & ~(BY2PG-1);
- print("memmapnext() base 0x%zx size 0x%zux %zud\n", base, size, size);+ DP("memmapnext() base 0x%zx size 0x%zux %zud\n", base, size, size);if(size == 0)
continue;
if(cm >= &conf.mem[nelem(conf.mem)]){@@ -755,7 +755,7 @@
continue;
}
base = memmapalloc(base, size, BY2PG, MemRAM);
- print("memmapalloc() base 0x%zx\n", base);+ DP("memmapalloc() base 0x%zx\n", base); if(base == -1){ print("base == -1\n");continue;
@@ -762,16 +762,17 @@
}
cm->base = base;
cm->npage = size/BY2PG;
- print(" cm->base 0x%zx cm->npage 0x%zux %zud\n", cm->base, cm->npage, cm->npage);+ DP(" cm->base 0x%zx cm->npage 0x%zux %zud\n", cm->base, cm->npage, cm->npage);cm++;
}
print("meminit: conf.mem entries\n");for(i = 0; i < nelem(conf.mem); i++)
- print("%d base 0x%zx 0x%zp npage 0x%zx %zd\n",- i, conf.mem[i].base, conf.mem[i].base,
- conf.mem[i].npage, conf.mem[i].npage);
+ if(conf.mem[i].base != 0)
+ print("%d base 0x%zx 0x%zp npage 0x%zx %zd\n",+ i, conf.mem[i].base, conf.mem[i].base,
+ conf.mem[i].npage, conf.mem[i].npage);
- memmapdump();
+ /* memmapdump(); */
// showpagetables((uintptr*)PML4ADDR);
//showpagetables((uintptr*)PML4ADDR);
}
--- a/os/pc64/mmu.c
+++ b/os/pc64/mmu.c
@@ -281,7 +281,7 @@
if(size <= 0)
panic("pmap: pa=%#zux size=%lld", pa, size);- print("pmap pa 0x%zux-0x%zux flags 0x%llux size %llud 0x%llux\n",+ DP("pmap pa 0x%zux-0x%zux flags 0x%llux size %llud 0x%llux\n",pa, (uintptr)pa+size, flags, size, size);
pa = PPN(pa);
DP("\tpa 0x%zux\n", pa);--- a/os/pc64/squidboy.c
+++ b/os/pc64/squidboy.c
@@ -8,12 +8,13 @@
#include "mp.h"
+#define DP if(1){}else print+
extern void _stts(void);
static void
squidboy(Apic* apic)
{-print("starting squidboy\n");machinit();
mmuinit();
cpuidentify();
@@ -36,10 +37,10 @@
uintptr *apbootp, *pml4/*, *pdp0*/;
Segdesc *gdt;
Mach *mach;
- uchar *p, *q;
+ uchar *p /*, *q */;
int i;
-print("mpstartap apic->machno %d: \n", apic->machno);+ DP("mpstartap apic->machno %d: \n", apic->machno);/*
* Initialise the AP page-tables and Mach structure.
* Xspanalloc will panic if an allocation can't be made.
@@ -69,8 +70,9 @@
*/
for(i=0; i<BY2PG/8; i+=8){pml4[i] = MACHP(0)->pml4[i];
-if(pml4[i] != 0)
-print("mpstartap i %d pml4[i] 0x%p MACHP(0)->pml4[i] 0x%p\n", i, pml4[i], MACHP(0)->pml4[i]);+ if(pml4[i] != 0)
+ DP("mpstartap i %d pml4[i] 0x%p MACHP(0)->pml4[i] 0x%p\n",+ i, pml4[i], MACHP(0)->pml4[i]);
}
/*
@@ -83,10 +85,12 @@
apbootp[2] = (uintptr)apic;
apbootp[3] = (uintptr)mach;
apbootp[4] |= (uintptr)m->havenx<<11; /* EFER */
-for(i=0;i<80;i++){- print(" %x", *((uchar*)APBOOTSTRAP+i));-}
-print("\n");+ /*
+ for(i=0;i<80;i++){+ print(" %x", *((uchar*)APBOOTSTRAP+i));+ }
+ print("\n");+ */
/*
* Universal Startup Algorithm.
@@ -100,6 +104,7 @@
print("mp: bad APBOOTSTRAP i 0x%ux\n", i);*p++ = i;
*p = i>>8;
+ /*
print("p 0x%p PADDR(APBOOTSTRAP) 0x%p (PADDR(APBOOTSTRAP) & ~0xFFFF)/16 0x%p\n",p, PADDR(APBOOTSTRAP), (PADDR(APBOOTSTRAP) & ~0xFFFF)/16);
for(q = (uchar*)KADDR(0x467); q<=p; q++){@@ -106,6 +111,7 @@
print(" q 0x%p *q 0x%x",q, *q);}
print("\n");+ */
coherence();
nvramwrite(0x0F, 0x0A); /* shutdown code: warm reset upon init ipi */
@@ -114,11 +120,9 @@
if(arch->fastclock == tscticks)
cycles(&m->tscticks); /* for ap's syncclock(); */
if(apic->online){-print("online\n");break;
}
delay(1);
}
-print("nvramwrite(0x0F, 000)\n");nvramwrite(0x0F, 0x00);
}
--- a/os/pc64/trap.c
+++ b/os/pc64/trap.c
@@ -365,9 +365,9 @@
/* clear the interrupt */
i8259isr(vno);
- if(1)print("cpu%d: spurious interrupt %d, last %d",+ if(0)print("cpu%d: spurious interrupt %d, last %d",m->machno, vno, m->lastintr);
- if(1)if(conf.nmach > 1){+ if(0)if(conf.nmach > 1){ for(i = 0; i < MAXMACH; i++){if(active.machs[i] == 0)
continue;