ref: df04ea8d6c2e1e75307a77f2b086a836f480ab72
dir: /sys/src/9/cycv/io.h/
#define UART_BASE 0xFFC02000 #define MPCORE_BASE 0xFFFEC000 #define L2_BASE 0xFFFEF000 #define CLOCKMGR_BASE 0xFFD04000 #define EMAC1_BASE 0xFF702000 #define RESETMGR_BASE 0xFFD05000 #define SYSMGR_BASE 0xFFD08000 #define FPGAMGR_BASE 0xFF706000 #define FPGAMGRDATA 0xFFB90000 #define OCRAM 0xFFFF0000 #define DMAS_BASE 0xFFE01000 #define L3_BASE 0xFF800000 /*RESETMGR*/ #define PERMODRST (0x14/4) #define BRGMODRST (0x1C/4) /*SYSMGR*/ #define FPGA_MODULE (0x28/4) #define HPS_CLK 25 #define TIMERIRQ 29 #define UART0IRQ 194 #define EMAC1IRQ 152 #define FPGAMGRIRQ 207 #define DMAIRQ0 136 #define DMAABORTIRQ 144 #define LEVEL 0 #define EDGE 1